ARPITA scaling have contributed significantly to the current scenario

 
 
ARPITA GUPTA(16100016)

 
 
RASHI BUDATI(16100020)

We Will Write a Custom Essay Specifically
For You For Only $13.90/page!


order now

Department of Computer Science and  Engineering

Department of Computer Science and  Engineering

                                   IIIT- Naya
Raipur

                                 IIIT- Naya Raipur

                               
Chhattisgarh, India

                                
Chhattisgarh, India

[email protected]
 

[email protected]
 

        Abstract – This paper deals with the applications of Moore’s
Law in the technological advancement in the area of semiconductor Industry for
50 years. Semiconductor plays a vital role in the foundation of communication systems
and is the basis of Internet of Everything(IoE). However the future predictions
by the Moore’s Law was not considered valid after 50 years because of its
ambiguous prediction since it was not a physical or natural law but a mere
observation by Gordon Moore. The present scenario of increasing costs and
efficiency of the integrated circuits pose a challenge to the developmental
aspect.  Introduction of 3D
transistors  which enhance the capability
of CMOS Technology lead to increasing capabilities . In addition to the scaling
of CMOS technology beyond 14nm, there are leading technology options on the
horizon beyond CMOS with potential design benefits that can advance Moore’s Law
well into the future.    

 

                Index Terms – IoE, CMOS
Technology, 3D transistors.

 

I.  Introduction

                Since this paper mainly deals
with the concept of Moore’s law we will first define as to what this law
is.  The Moore’s Law states that “The
transistors used in integrated circuits per inch doubles every year.” This law gave a lot of advantages to the
field of electronic technology by decreasing the cost of the high – powered
equipments which came down to a greater extent . The machines which had
application of Moore’s law, were faster than those which didn’t. The
transitions which have continued since the past years i.e from bipolar to
MOSFETS, to CMOS, to voltage scaling and power efficient scaling have
contributed significantly to the current scenario of developments in the
silicon technology.

 

                                II.DETAILS
A trend towards making a
digital, high quality features from integrated analog components like PLLs,
I/Os and thermal sensors have an application to improve the leading technology
Intel i.e from 22nm to 14nm technology nodes. By contrast the clock rates of
the microprocessors have relatively slow enhancement in the past few decades
since there has been more stress towards the power efficient parallel
architectures. But the improvements in the area density and power should keep
pace with aggregate system bandwidth requirements as well. A type of
semiconductor memory that uses flip flops to store bits called static random
access memory remains the work horse for all various VLSI applications. But
voltage scaling for power efficiency has created a challenge for the memory to
operate in lower voltages. The most advanced 14nm FINFET has improved the SRAM
voltages. With ever increasing memory requirements for the new applications
such as high resolution graphics and cloud computing, the traditional memories
are not sufficient. Hence the use of the capacitor within an integrated circuit
which serves the purpose of random access semiconductor memory called
DRAM(Dynamic Random Access Memory) and EDRAM’s have been an alternative.
Optimization at the system level is required for obtaining the full advantages
of these new technologies as we are moving forward. An extension beyond the 2D
scaling trajectory as predicted by Moore’s law called the Monolithic 3D(M-3D)
has emerged as an alternative for the integration technology that reduced the
gaps significantly between the transistors and the interconnect delays which
has added to achieve high performance in low cost. But logic-to-logic memory
integration still remains an open area. The use of embedded multi-chip interconnect
bridge in which a tiny silicon bridge is embedded in the packet substrate has
provided a good chip-to-chip connection for high data bandwidth. For achieving
economical benefits, the re-optimization of the overall systems architectures
and configurations would become an important aspect.

 

                  III.
DIAGRAMMATIC REPRESENTATION

 

             
FIGURE-1: Generational Technology Benefits.

 

 

 

 FIGURE-2: Process and Device Innovations
Essential to Moore’s Law

 

                                                                                               figure-3: 10Gb/s serial I/O in 14nm CMOS

 

FIGURE-4: PREDICTIONS BY MOORE’S LAW

 

 

 

IV.
CONCLUSION:

 

Almost in every field whether it be communication or IoE, Moore’s law
has played it’s role. It has application in the technological advancement
related to computing devices and has enabled it to become a seamless and
powerful force in a day-to-day lives.

More recently, speculations have focused on the economic end of Moore’s
law. Because
Moore’s law suggests exponential growth ,
it is unlikely to continue indefinitely but in fifty years, it has vast
contributions in the field of semiconductor technology however, its technical
benefits seem to have been declining.  Reliability would become a  major issue as well. It has been a strong
belief that a new definition  to the
Moore’s Law would bring a new innovation in the
Information Technology as it would bring a coordination among the  technologies instead of miniaturization of
long existing technologies. Moore’s law has thrived to result in continuous
innovation, rigorous and technology
execution. And it will continue to power us into the future of CMOS and beyond.
For  Future Si technologies, the
introduction of Enhancement mode Gallium Nitride transistors has been
introduced .

 

V.
ACKNOWLEDGEMENT:

 

We would like to thank Dr. Ramesh Vaddi
and IIIT-NR for giving us this opportunity to learn about the recent trends in
technology and thereby helping us to enhance our thinking and motivating us to
explore new areas of technological developments.

 

VI.
REFERENCES

 

1. Moore’s Law: A Path Going Forward by William M.
Holt Executive Vice President, General Manager, Technology and Manufacturing
Group, Intel, Hillsboro, Oregon,2016

2. Gordon Moore, “50 Years of Moore’s Law”, Intel.com
video, April, 2015

3. “Celebrating 50 Years of Moore’s Law – Whatever Has
Been Done Can Be Outdone”, Intel.com, April 2015,

4. Has
Moore’s Law Been replaced? An Economists’s Perspective-Kenneth flamm

5.The End Of Moore’s Law- A
New Beginning of Information Technology- Thomas N. Theis,H.-S. Philip Wong

6. “It’s Time to Redefine
moore’s Law Again”-Erik p. Benedictis

7.”GaN Transistors- Giving
a new life to Moore’s law”-Alex Lidow

8. “Computation Beyond
Moore’s Law- Adaptive Field Effect Devices for Reconfigurable Logic and
Hardware-Based Neural Networks”- Udo Schwalke

9. Sustaining Moore’s law with 3D chips   Erik P. DeBenedictis;
Mustafa Badaroglu;
An Chen; Thomas M. Conte;
Paolo Gargini

10.
Managing Moore’s law-: A survival guide for Vlsi manufacturers-Charles M. Weber.
Jiting Yang